The Optics of Thermotropic Liquid Crystals

Introduction:@ Background:The ESD Problem:Protecting against ESD:Outline of the Book:References:ESD Phenomena and Test Methods:@ Introduction:Human Body Model (HBM):Machine Model (MM):Charged Device Model (CDM):Comparisons between the Test Methods:Transmission Line Test Method:Other Test Methods:Failure Criteria:Test Procedures:References:Physics and Operation of ESD Protection Circuit Elements@ Introduction:Resistors: Diodes: Forward bias:Reverse bias:p-i-n Diode:@: Transistor Operation: Bipolar transistors:MOS transistors:Avalanche conditions:@: Transistor Operation under ESD Conditions: Bipolar transistors:MOS transistors:@:SCR Operation:References:Design and Layout Requirements@ Introduction: Design Concepts: Thick field device:nMOS transistors (FPDs):Gate-coupled nMOS (GCNMOS):SCR protection devices:@: ESD Protection Design Synthesis: SCR primary protection:Secondary protection devices Field plate diode Isolation resistor:Protection scheme:@: Total Input Protection: Inputs with diffusion resistor:Inputs with polysilicon resistor:Polysilicon resistor reliability:@:Input/Output Buffer Layout and Protection:Selecting a Protection Circuit: Bipolar and BiCMOS Protection Circuits: Introduction:Protection circuit strategies:Bipolar/BiCMOS output protection:Bipolar/BiCMOS input protection:Layout:ESD and performance trade-offs:@:Summary:References:Failure Modes, Reliability Issues and Case Studies:@ Introduction: Failure Mode Analysis: Failure analysis techniques:Electrical characteristics after damage:Physical analysis of failure modes:@:Reliability and Performance Considerations:Advanced CMOS Input Protection:Optimizing the Input Protection Scheme:Designs for Special Applications:Process Effects on Input Protection Design:Total IC Chip Protection:Power Bus Protection: Internal Chip ESD Damage: Vdd ­ Vss Stress current damage:Output to Vdd stress:@:Stress Dependent ESD Behavior:Summary:References:Modeling and Characterization:@ Introduction:The Physics of ESD Damage:Thermal (Second) Breakdown:Analytical Models Using the Heat Equation:Electrothermal Simulations:Circuit Simulations:References:Influence of Processing on ESD:@ Introduction:Source/Drain Junction Effects:Gate Oxides:Contacts and Silicidation: Wells, Epitaxial Thickness and Substrate Resistance: Wells:Epitaxial thickness:Substrate resistance:@:Silicon-On-Insulator (SOl):Packaging:References:Conclusions@ Long-term Relevance of ESD in ICs:State-of-the-Art for ESD Protection:Current Limitations:Future Issues:References: